For a full list of my publications, see here.
Highlighted Publications
RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency
digital systems, Konstantin K Likharev, Vasili K Semenov.
Recent developments of the rapid single-flux-quantum (RSFQ) circuit family are reviewed.
Elementary cells of the family can generate, pass, memorize, and reproduce picosecond
voltage pulses V (t) with nominally quantized area Jv (t) dt=~ 0, corresponding to
transfer of a single magnetic flux quantum~ o= h/2e across a Josephson junction. Functionally,
each cell can be viewed as a combination of a logic gate and an output latch (register)
controlled by clock pulses, which are physically similar to the signal pulses. Hand-shaking
style of local exchange by the clock pulses enables one to increase complexity of
the LSI RSFQ systems without loss of operating speed. The simplest components of the
RSFQ circuitry have been experimentally tested at clock frequencies exceeding 100
GHz, and an increase of the speed beyond 300 GHz is expected as a result of using
an up-to-date fabrication technology. The review includes a discussion of possible
future developments and applications of this novel, ultrafast digital technology.
Progress with physically and logically reversible superconducting digital circuits, Jie Ren, Vasili K Semenov.
We continue to develop a new Superconductor Flux Logic (SFL) family based on nSQUID
gates with fundamentally low energy dissipation and the ability to operate in irreversible
and reversible modes. Prospective computers utilizing the new gates can keep conventional
logically irreversible architectures. In this case the energy dissipation is limited
by fundamental thermodynamic laws and could be as low as a few kBT s per logic operation.
Highly exotic and less practical logically and physically reversible circuit architectures
are more attractive for us because they enable a reduction of the specific energy
dissipation well below the thermodynamic threshold kBT ln2. The reversible option
is of interest to us because we can then experimentally demonstrate that all technical
mechanisms of the energy dissipation could be cut below the fundamental thermodynamic
limit. In other words, we like to set the energy dissipation record for all conventional
digital technologies that (if measured in kBT ) is about one million times below the
best figures achieved in commercially available semiconductor circuits. Besides, we
believe that diving below the thermodynamic threshold would have impressive scientific
and philosophical im pacts. In the paper we introduce a new timing belt clocking scheme
and present new circuits. While we still work with test circuits, some of them contain
two 8-stage shift registers, one with direct and the other with inverted outputs.
The energy dissipation per nSQUID gate per bit measured at 4 K temperature is already
below the thermodynamic threshold. We are confident that we passed through the critical
phase of the project and we simply need more time to make more sophisticated circuits.
The extremely low energy dissipation converts our circuits into a natural candidate
to support circuitry for any sensors operating at milli-Kelvin temperatures.
BioSFQ Circuit Family for Neuromorphic Computing: Bridging Digital and Analog Domains
of Superconductor Technologies, Vasili K Semenov, Evan B Golden, Sergey K Tolpygo.
Superconductor single flux quantum (SFQ) technology is attractive for neuromorphic
computing due to low energy dissipation and high, potentially up to 100 GHz, clock
rates. We have recently suggested a new family of bioSFQ circuits (V.K. Semenov et
al., IEEE TAS, vol. 32, no. 4, 1400105, 2022) where information is stored as a value
of current in a superconducting loop and transferred as a rate of SFQ pulses propagating
between the loops. This approach, in the simplest case dealing with positive numbers,
requires single-line transfer channels. In the more general case of bipolar numbers,
it requires dual-rail transfer channels. To address this need, we have developed a
new comparator with a dual-rail output. This comparator is an essential part of a
bipolar multiplier performing an X⋅Y operation on two analog currents X and Y. The
multiplier has been designed, fabricated, and tested. We also present bioSFQ circuits
for implementing an analog bipolar divide operation Y/X and a square root operation
√X . We discuss strategic advantages of the suggested bioSFQ approach, e.g., an inherently
asynchronous character of bioSFQ cells which do not require explicit clock signals.
As a result, bioSFQ circuits are free of racing errors and tolerant to occasional
collision of propagating SFQ pulses. This tolerance is due to the stochastic nature
of data signals generated by comparators operating within their gray zone. The circuits
were fabricated in the eight-niobium-layer fabrication process SFQ5ee developed for
superconductor electronics at MIT Lincoln Laboratory.